Lithographic projection apparatus (tools) can be used, for example, in the manufacture of integrated circuits (ICs). When using the various tools, a mask can be used that contains a circuit pattern corresponding to an individual layer of the IC, and this pattern, usually having many features, can be imaged onto a target portion (e.g., comprising one or more dies) on a substrate, such as a silicon or other wafer comprising a semiconductor, that has been coated with a layer of radiation-sensitive material, such as a resist. In general, a single wafer may contain a network of adjacent target portions that can be successively irradiated using a projection system of the tool, one at a time. In one type of lithographic projection apparatus, each target portion is irradiated by exposing the entire mask pattern onto the target portion in one shot. In another apparatus, which is commonly referred to as a step-and-scan apparatus, each target portion is irradiated by progressively scanning the mask pattern under the projection beam in a given reference direction (the “scanning” direction) while synchronously scanning the substrate table parallel or anti-parallel to the scanning direction. Because the projection system typically has a magnification factor M, which is generally less than 1, the speed V at which the substrate table is scanned will be a factor M times that at which the mask table is scanned. More information with regard to lithographic apparatus can be found, for example, in U.S. Pat. No. 6,046,792, which is incorporated by reference herein in its entirety.
In a manufacturing process using a lithographic projection apparatus, a mask pattern can be imaged onto a substrate that is at least partially covered by a layer of resist. Prior to this imaging step, the substrate may undergo various procedures, such as, priming, resist coating, and a soft bake. After exposure, the substrate can be subjected to other procedures, such as a post-exposure bake (PEB), development, a hard bake, and a measurement/inspection of the image features. This array of procedures can be used as a basis to pattern an individual layer of a device, such as an IC. Such a patterned layer may then undergo various processes, such as etching, ion-implantation, doping, metallization, oxidation, chemical mechanical polishing (CMP), etc., all intended to complete an individual layer. If several layers are required, then part of all of the procedure, or a variant thereof, may need to be repeated for each new layer. Eventually, an array of devices can be present on the substrate. These devices can then be separated from one another by a technique such as dicing or sawing. Thereafter, the individual devices can be mounted on a carrier, connected to pins, etc.
The lithographic tool may be of a type having two or more substrate tables (and/or two or more mask tables). In such “multiple stage” devices, the additional tables may be used in parallel, or preparatory steps may be carried out on one or more tables while one or more other tables are being used for exposure.
The photolithography masks referred to above comprise geometric patterns, also called features, corresponding to the circuit components or structures to be integrated onto a substrate. The patterns used to create such masks are typically generated using computer-aided design (CAD) programs, sometimes called electronic design automation (EDA). Most CAD programs follow a set a predetermined design rules in order to create functional masks. These rules are set by processing and design limitations. For example, design rules can define the space tolerance between circuit devices, such as gates, capacitors, etc., or interconnect lines, so as to ensure that the circuit devices or lines do not interact with one another in an undesirable way.
One of the goals in IC fabrication is to faithfully reproduce the original circuit design on the wafer using the mask. Another goal is to use as much of the wafer real estate as possible. As the size of an IC is reduced and its density increases, however, the critical dimension (CD) of its corresponding mask pattern approaches the resolution limit of the optical exposure tool. The resolution for an exposure tool can be defined as the minimum feature sizes that the exposure tool can repeatedly expose on the wafer. The resolution value of present exposure tools often constrains the CD for many advanced IC designs.
In some circuits in which the size of the circuit features approach the optical limits of the lithography process, one or more resolution enhancement techniques can be used to improve the accuracy of the pattern transfer from the layout to the wafer. For example, as the size of integrated circuit features drops to 0.18 μm and below, the features can become smaller than the wavelength of light used to create such features, thereby creating lithographic distortions when printing the structures onto the wafer. Resolution enhancement techniques (RETs) can compensate for such lithographic distortions. Such RETs may include, for example, optical proximity correction, phase shifting, and off-axis illumination.
Although RETs can improve the wafer printability, RETs can be pitch sensitive. Pitch can be defined as a distance between a centerline of one feature (or structure) to the centerline of an adjoining feature (or structure). As such, pitch can be a relative measure of whether a design is characterized as having isolated features (or structures) or densely populated features (or structures).
Unfortunately, when using a RET, certain pitches in a design may result in significant degradation of image quality. A threshold pitch can be assigned, as defined by, for example, contrast, size of a process window, mask error factor, or some other parameter, such that pitches greater than the threshold produce satisfactory features (or structures) and pitches smaller than the threshold produce unsatisfactory features (or structures). An unsatisfactory pitch can be described as a “forbidden pitch.”
Additional factors in combination with the pitch can also affect the image quality. For example, two dimensional (2D) factors such as the proximity, size, and/or shape of the features near the features of interest can affect image quality.
Thus, there is a need to overcome these and other problems of the prior art to provide mask patterns that can work beyond the typical forbidden pitch.